ams OSRAM Unveiled Micro-VCSEL Arrays for AI Networks
The new 850nm platform aims to lower energy consumption in AI data centers to 0.25 pJ/bit.
Updated on Sept. 27, 2026 in Semiconductors
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ams OSRAM has announced a new thin-film micro-VCSEL platform designed for high-bandwidth AI infrastructure. The system, which currently exists as an announced technology, integrates micro-emitter arrays directly onto silicon TSV substrates.
Why it matters
As AI training and inference clusters demand massive increases in throughput, this architecture addresses the need for higher energy efficiency. By utilizing a wide-and-slow optical approach, the platform aims to reduce complexity in inter-chip communication.
The system utilizes 25µm-pitch micro-VCSEL arrays to achieve error-free 32Gb/s non-return-to-zero (NRZ) data transmission. Reliability testing confirmed no failures after 2000 hours of operation.
The players
ams OSRAM
An Austrian semiconductor and photonics manufacturer specializing in sensor and emitter technologies for industrial and consumer applications.
BizLink
A global provider of interconnect solutions, including high-speed cables and fiber connectivity hardware for data center infrastructure.
The details
This technology employs a wide-and-slow optical architecture, which prioritizes parallel data movement over high-complexity serial channels. It achieves this by combining addressable micro-emitter arrays with CMOS (complementary metal-oxide-semiconductor) integration on silicon TSV (through-silicon via) substrates, which provide vertical electrical connections through the semiconductor wafer. The integration allows for highly parallel optical signaling at 850nm wavelengths.
Timeline
September 21-23, 2026: ams OSRAM demonstrated the technology at ECOC 2026 in Málaga.
The Tech Race
The development represents a push to standardize integrated 3D photonics stacks for next-generation AI clusters. This follows an industry-wide effort to reduce interconnect energy costs relative to the high-bandwidth requirements of modern AI training hardware.
The technology is currently an announced platform and is not yet available for commercial deployment in AI data centers. It is intended to eventually replace current interconnect methods in large-scale AI training and inference hardware.
The takeaway
This platform attempts to solve the power scaling issues of future AI interconnects by shifting toward high-density, low-power parallel optics. Watch for the company's next milestones in 3D photonics stack integration to confirm the performance viability of this architecture.
Further reading
For more on the latest developments in optical components and high-speed data pathways, visit Semiconductors.
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