Researchers Identified Root Cause of Semiconductor Defects
A new design principle for oxide films may reduce power loss in next-generation semiconductor devices.
Updated on Oct. 1, 2026 in Semiconductors
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Researchers at Kangwon National University and Harvard University have identified that incomplete oxide films and hydrogen retention are the primary causes of interface defects in semiconductors. These findings, published in the journal Advanced Materials, propose a new method for fabricating dense films to mitigate these issues.
Why it matters
Current defect mitigation techniques like hydrogen annealing often fail to prevent initial defect formation during fabrication. By addressing these flaws at the atomic level, the new design principle could improve device reliability and energy efficiency in 3D stacking applications.
The team demonstrated that forming dense oxide films at 150°C during plasma atomic layer deposition minimizes interface defects. This process directly counters the tendency for hydrogen accumulation, which currently leads to increased current leakage and power consumption.
The players
Kangwon National University
A South Korean research institution focusing on materials science and semiconductor fabrication.
Harvard University
A private research university involved in advanced materials and atomic-scale structural analysis.
The details
The researchers utilized atomic-scale analysis to observe how hydrogen retention within thin films correlates with interface defect density. They established that the completeness of the oxide film acts as the governing factor for interface quality. By implementing a specific density-control protocol during plasma atomic layer deposition—a process where thin films are deposited onto a substrate by reacting gaseous precursors—the team successfully suppressed the pathways that lead to current leakage.
Timeline
September 29, 2026: Professor Um announced the research findings.
The Tech Race
This development addresses a critical bottleneck in the semiconductor 3D stacking manufacturing roadmap by targeting the root causes of interface instability. It moves beyond current industry reliance on post-fabrication annealing by proposing a preventive structural design principle.
This research provides a foundation for more efficient and reliable hardware, though it is currently in the experimental stage. Future integration into manufacturing workflows could eventually lead to lower power consumption in the high-performance devices used in data centers and consumer electronics.
The takeaway
The study confirms that improving the density of oxide films is the most effective path toward reducing semiconductor power waste. Watch for updates on whether these atomic-level principles are successfully adopted by plasma atomic layer deposition equipment manufacturers.
Further reading
For more on industry-wide advancements in chip architecture, see our Semiconductors coverage.
Source note: This article includes information reported by 조선일보.
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