Researchers Fabricated 4-Inch Boron Nitride Wafers

The research demonstrates a new growth process for rhombohedral phase boron nitride capable of stable ferroelectric memory.

Updated on Sept. 29, 2026 in Semiconductors

Top-down macro view of a circular, translucent boron nitride wafer resting on a sapphire platform in a laboratory setting.
Researchers have demonstrated a new fabrication process for 4-inch rhombohedral boron nitride wafers, a breakthrough for stable, high-performance ferroelectric memory devices. AI Illustration. Upload story photo >

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Researchers have demonstrated a fabrication process for 4-inch rhombohedral boron nitride (rBN) wafers using a step-templated interfacial epitaxy strategy. This development marks a transition for the material, which is historically difficult to grow due to its thermodynamically unstable phase.

Why it matters

Scaling rBN is necessary to leverage its unique ferroelectric properties for high-performance memory, as the material can now be integrated into stable, long-term switching components. This method addresses the challenge of consistent growth for rhombohedral phases, potentially opening new paths for non-volatile memory density.

The fabricated field-effect transistors (FeFETs) function at a 30 nm channel length, maintaining a 4 V memory window and an on/off ratio of 10^5. These devices exhibit stable performance at temperatures exceeding 470 K and demonstrate non-volatility durations of over 10 years.

The details

The production process utilizes nickel-boron films sputtered on stepped sapphire substrates to guide the growth of the rhombohedral crystal lattice. This 'step-templated interfacial epitaxy'—a method where the surface structure of the substrate dictates the alignment of the growing material layer—allows for the creation of uniform, large-scale wafers. The resulting material enables sliding ferroelectric memory, where the atomic layers physically shift to store digital states, providing high-speed switching at the nanosecond scale.

Timeline

  1. September 29, 2026: Research findings were officially published.

The Tech Race

This research follows the trajectory established by the development of high-k dielectric materials in CMOS manufacturing, shifting focus toward next-generation memory substrates. The successful scaling of rBN wafers provides a potential alternative to current ferroelectric architectures that struggle with thermal and endurance limitations.

This research remains at the laboratory stage and is not currently available for commercial product integration. Developers and engineers can look for future benchmarks involving higher-density integration or pilot-scale production runs to assess long-term feasibility for consumer hardware.

The takeaway

The successful fabrication of 4-inch wafers moves rBN from a theoretical material to one capable of practical transistor evaluation. Observers should track subsequent peer-reviewed findings regarding the scalability of the nickel-boron sputtering process on larger-diameter substrates.

Further reading

For more on the current state of material science in hardware, visit /tech/semiconductors/.

Source note: This article includes information reported by Nature.

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Researchers Fabricated 4-Inch Boron Nitride Wafers | Highwise Tech