AMD Integrated ROCm Software Into SiFive BigSky Platform

The collaboration enables AI workload processing on RISC-V architectures to accelerate datacenter adoption.

Updated on Sept. 29, 2026 in Semiconductors

Bold flat-color editorial illustration depicting a complex silicon processor die, symbolizing high-performance datacenter hardware integration.
AMD has integrated its ROCm software stack with SiFive's BigSky platform, enabling AI workload processing on open-standard RISC-V architectures for datacenter applications. AI Illustration. Upload story photo >

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AMD has integrated its ROCm software ecosystem onto the SiFive BigSky datacenter platform. This announced development marks a transition toward running AI workloads on RISC-V, an open standard instruction set architecture.

Why it matters

The partnership aims to expand the viability of open-standard RISC-V architectures for high-performance datacenter computing. By pairing AMD software with SiFive hardware, the companies seek to increase processing speeds for AI and support larger models.

The SiFive BigSky platform features 32 P870-D cores running at 2.0 GHz, supported by 256GB of DDR5-5600 memory. Connectivity includes 4x PCIe Gen5 x16 lanes and 10/25Gb OCP 3.0 networking, complemented by 2x 7.68TB U.2 NVMe storage drives.

The players

AMD

A designer of high-performance computing, graphics, and visualization technologies including the ROCm software stack.

SiFive

A developer of RISC-V commercial processors and SoC IP used in the BigSky datacenter development platform.

The details

The integration leverages the AMD ROCm open software stack, a collection of drivers and libraries for GPU and accelerator computing, to communicate with the RISC-V architecture. By enabling ROCm to function on the BigSky platform, developers can utilize open standard hardware to execute compute-intensive AI tasks. The platform architecture also incorporates high-bandwidth PCIe Gen5 lanes to facilitate data movement between the cores and external accelerators.

Timeline

  1. September 29, 2026: Announcement of the AMD and SiFive software collaboration.

The Tech Race

This integration marks a strategic move to validate RISC-V as a viable competitor to established proprietary architectures in the datacenter. It pits the open standard against dominant x86 and ARM ecosystems by providing the necessary software tooling for AI scalability.

Developers and datacenter operators can expect to begin evaluating RISC-V for AI-intensive workflows as the companies assess optimization paths for the platform. Availability and broader commercial deployment timelines for this integrated stack remain unannounced.

The takeaway

This partnership provides a clear path for open-source silicon to enter the AI-accelerated datacenter market. Watch for future performance benchmarks released by the companies as they attempt to optimize ROCm on the SiFive hardware.

Further reading

For broader trends in chip design and datacenter hardware, visit the Semiconductors section.

Source note: This article includes information reported by Embedded Computing Design.

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