Delos Data Announced Apollo Data Interface Chiplet
The new interface aims to reduce switch latency for CPU and memory endpoints by streamlining communication semantics.
Updated on Sept. 24, 2026 in Semiconductors

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Delos Data has announced the Apollo data interface chiplet designed to manage I/O for CPU and memory endpoints. The company also confirmed it has raised over $100 million in venture capital to support its semiconductor and software roadmap.
Why it matters
The development targets latency inefficiencies inherent in traditional switches that struggle to bridge devices with disparate communication semantics. This announcement follows the company's established production deployment of its Mosaic cluster management software.
The Apollo chiplet provides 30+ Tbps of I/O throughput, significantly outpacing the 400+ Gbps throughput typically seen in individual CPU card configurations. The chiplet architecture handles native load balancing, network topology management, and error handling for connected endpoints.
The players
Delos Data
A semiconductor and software startup focused on cluster management and high-performance data interface hardware.
The details
Apollo chiplets operate by managing topology, load balancing, and failure handling at the I/O layer, which decouples these processes from the CPU. Delos Data also offers the Morpheus platform, a development environment that allows engineers to perform topology co-design between pre-silicon simulations and physical laboratory setups. This approach addresses current performance bottlenecks caused by latency when bridging endpoints that utilize different communication semantics.
Timeline
Asterion server sampling is scheduled for Q4 2026.
Near-packaged optical interface chips are expected in 2027.
Apollo chiplet availability in XPU products is projected for 2028.
The Tech Race
Delos Data is attempting to bridge the performance gap between existing CPU-centric architectures and the high-bandwidth requirements of future AI clusters. The project follows the industry-wide effort to move beyond legacy electrical signaling by integrating 10+ Tbps NPO chips into standard compute stacks.
This technology will initially reach enterprise data centers and developers utilizing XPU-based high-performance computing environments. Users can expect the first tangible integration of these chiplets in XPU products beginning in 2028.
The takeaway
Delos Data is betting that specialized interface chiplets are the key to unlocking throughput in heterogeneous computing environments. Stakeholders should track the rollout of the Morpheus development platform to see how it simplifies topology co-design for next-generation server clusters.
What happens next
Watch for Asterion server sampling scheduled to begin in late 2026, which will serve as the first major validation of the Apollo chiplet in production-grade hardware.
Further reading
For more on the current state of high-performance computing, see our section on Semiconductors.
Source note: This article includes information reported by EE Times.
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