Teradyne Partnered With GS Microelectronics on Test Center

The companies have established a 42,000-square-foot Silicon Valley facility to support complex chip development by 2026.

Updated on Sept. 22, 2026 in Semiconductors

Isometric editorial illustration of circular silicon wafers arranged in a grid on a metal surface, representing semiconductor test technology.
Teradyne has partnered with GS Microelectronics to launch a 42,000-square-foot semiconductor testing facility in Silicon Valley, scheduled for operation by late 2026. AI Illustration. Upload story photo >

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Teradyne has announced a partnership with GS Microelectronics to build a new semiconductor test facility in Silicon Valley. The 42,000-square-foot site is scheduled to open in the fourth quarter of 2026.

Why it matters

The center aims to address the rising technical demands of modern hardware, specifically for AI, silicon photonics, and power-management chips that require intensive evaluation. The partnership also supports a global expansion of GS Microelectronics' engineering workforce.

Teradyne reported $1.12 billion in semiconductor test revenue for Q2, alongside $200 million in memory-test revenue for the third consecutive quarter. The firm's total Q2 revenue reached $1.33 billion.

The players

Teradyne

A developer of automated test equipment for the semiconductor, electronics, and automotive industries.

GS Microelectronics

An engineering firm providing semiconductor test services and technical support teams across global regions.

The details

The facility will provide customers access to advanced test handlers — automated systems that move individual chips to testing stations — and probers, which are tools that establish electrical contact with wafers for quality verification. By providing a centralized location for joint sales and technical workshops, the collaboration targets the validation of specialized architectures like silicon photonics, where light-based signals replace electricity for faster data transmission, and automotive-grade power management.

Timeline

  1. Teradyne reported record Q2 revenue in 2026.

  2. The new test center is scheduled to open in the fourth quarter of 2026.

The Tech Race

This facility marks an expansion in the competitive landscape for chip validation services as demand for AI hardware outpaces traditional testing capacity. The move mirrors a broader industry push to consolidate testing infrastructure for specialized architectures that require higher precision than legacy platforms.

Once the facility opens in late 2026, manufacturers focusing on AI and automotive chips will gain a specialized site for testing high-complexity designs. This expansion helps reduce the time required to validate new hardware before it moves to full-scale production.

The takeaway

The partnership highlights how Teradyne is leveraging recent financial growth to double down on testing infrastructure for high-complexity silicon. Stakeholders should monitor the Q4 2026 opening to confirm if the facility reaches its intended capacity for AI and power-management chip testing.

Further reading

For more on the latest developments in testing, see our coverage on Semiconductors.

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Do you trust the long-term growth of companies heavily focused on AI hardware investments?

Teradyne Partnered With GS Microelectronics on Test Center