AlixLabs Began Pitch Splitting Technology Evaluation
The research aims to validate if atomic layer etching can double pattern density for advanced chip production.
Updated on Oct. 2, 2026 in Semiconductors
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AlixLabs has commenced a six-month evaluation of its Atomic Layer Etch Pitch Splitting technology at the imec NanoIC pilot line. The research-stage project seeks to determine if the process can effectively double feature density on silicon wafers.
Why it matters
As chipmakers face increasing difficulty with traditional lithography scaling, new methods for increasing pattern density are essential. This evaluation aims to prove the viability of pitch splitting for high-volume semiconductor manufacturing.
The project measures success across critical performance metrics including critical dimension uniformity, line-edge roughness, and stochastic defectivity. These results will establish how the process compares to existing multi-patterning techniques.
The players
AlixLabs
A Swedish developer of semiconductor patterning technologies focused on increasing feature density through etching.
imec
A global research hub for nanotechnology and digital innovation that operates pilot lines for semiconductor process integration.
The details
Atomic Layer Etch Pitch Splitting works by using atomic layer etching—a method that removes material one atomic layer at a time—to divide pre-patterned structures into two distinct lines. Imec prepares the initial line-and-space structures, which AlixLabs then processes to assess density gains. Development begins on small coupons before scaling to full semiconductor wafers.
Timeline
October 2026: The technology evaluation project commenced.
April 2027: The project evaluation is expected to conclude.
The Tech Race
This project integrates into the broader race to extend current lithography capabilities without relying solely on next-generation exposure tools. It marks a critical step for AlixLabs as it attempts to move its Sax Forma APS platform from research toward high-volume manufacturing readiness.
This technology remains in the research-stage and does not currently impact commercial chip production or consumer pricing. Its success would primarily enable foundry partners to manufacture higher-density logic circuits using existing lithography equipment.
The takeaway
The industry is closely watching whether pitch splitting can provide a viable cost-effective alternative to more complex multi-patterning techniques. Stakeholders should track the project's conclusion in April 2027 for data on the process's defectivity and stability.
What happens next
The evaluation project is scheduled for completion in April 2027, at which point performance metrics regarding defectivity and uniformity will be assessed.
Further reading
For more on the current state of process integration, visit the Semiconductors section.
Source note: This article includes information reported by eeNews Europe.
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