TSMC and Samsung Purchased High-NA EUV Tools
The two major chipmakers have secured advanced ASML systems to enable next-generation transistor scaling.
Updated on Sept. 19, 2026 in Semiconductors
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TSMC and Samsung have officially confirmed the purchase of ASML High-NA EUV lithography machines to support their future manufacturing roadmaps. These multi-million dollar tools are essential for producing the smallest transistors required for high-performance AI processors.
Why it matters
The adoption of these systems by leading chipmakers signals a critical industry transition toward 12-inch photomasks to compensate for the smaller printable field size inherent in High-NA optical designs. This move accelerates the path toward next-generation logic and memory production.
Each High-NA EUV machine costs $400 million and utilizes specialized optics that reduce the printable field size by approximately half compared to legacy tools. Intel has already validated the hardware by running more than a million wafers through its existing fleet.
The players
ASML
A Dutch manufacturer that holds a monopoly on the advanced photolithography systems required for cutting-edge semiconductor fabrication.
TSMC
A Taiwanese foundry and the world's largest contract chipmaker, specializing in advanced process nodes for AI and mobile silicon.
Samsung
A South Korean conglomerate that operates a major semiconductor division focused on both logic chip manufacturing and high-capacity DRAM.
Intel
A U.S.-based semiconductor company that serves as the lead operator for High-NA EUV systems with over one million wafers processed to date.
The details
High-NA EUV (extreme ultraviolet) lithography uses a higher numerical aperture to achieve finer feature resolution on silicon wafers. Because the new optics reduce the printable field size, chipmakers are moving from the legacy 6-inch photomask standard to a 12-inch format to provide a larger canvas for chip layout. This change helps mitigate the need for multi-exposure techniques, where manufacturers must stitch together multiple patterns to form a single complex chip.
Timeline
September 8, 2026: TSMC and Samsung announced their purchase of ASML tools.
Q4 2026: ASML must reach 90% fleet availability on its High-NA systems.
2028: Samsung plans to utilize High-NA EUV tools for DRAM manufacturing.
2030: TSMC targets the start of high-volume production using the new equipment.
2031: The industry expects to launch pilot lines for the 12-inch photomask standard.
The Tech Race
The transition to 12-inch photomasks marks a necessary evolution to support the complex optics of High-NA EUV lithography. This purchase cycle brings TSMC and Samsung into direct alignment with Intel's early adoption, standardizing the equipment requirements for the sub-2nm era.
While these machines will eventually underpin the high-performance processors in future consumer devices, users will not see direct effects until at least 2028 for memory and 2030 for logic chips. The transition ensures that AI hardware can continue to shrink in transistor size without hitting current manufacturing limitations.
The takeaway
The industry is now fully committed to the expensive High-NA transition to maintain the cadence of Moore's Law. Observers should track the Q4 2026 fleet availability target, as it will determine if the equipment is robust enough for the mass-production timelines promised by major foundries.
Further reading
For more on the current state of advanced chip manufacturing, visit Semiconductors.
Source note: This article includes information reported by Startup Fortune.
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